Introduction to digital design, combinational digital design and realization using: decoders, encoders, buffer, multiplexers, comparators, adders, and ALU, sequential design and realization using: latches, flip-flops, counters, and shift registers, memories, CPLD, and FPGA. Synchronous analysis and design using algorithmic state machines ASM, Digital design practice, CAD using FPGA and CPLD.
Bachelor Degree in Computer Engineering
Data will be available soon!
| content serial | Description |
|---|---|
| 1 | Week Number 1 : Introduction to digital design. |
| 2 | Week Number 2 : Quine-McCluskey Simplification Algorithm. |
| 3 | Week Number 3 : Algorithmic state machine (ASM) chart. |
| 4 | Week Number 4 : Timing Analysis of Digital Designs. |
| 5 | Week Number 5 : Physical Layout of PLA, PLD, CPLD, GAL, and FPGA. |
| 6 | Week Number 6 : Combinational logic design practices: VHDL. |
| 7 | Week Number 7 : 7th Week Exam + Sequential logic design practices. |
| 8 | Week Number 8 : Sequential logic design practices. |
| 9 | Week Number 9 : Interfacing with FPGA/CPLD boards. |
| 10 | Week Number 10 : Interfacing with FPGA/CPLD boards. |
| 11 | Week Number 11 : Hierarchical and Modular Design. |
| 12 | Week Number 12 : 12th Week Exam + Hierarchical and Modular Design. |
| 13 | Week Number : Project Ideas. |
| 14 | Week Number 14 : Project Discussions. |
| 15 | Week Number 15 : Revision. |
| 16 | Week Number 16 : Final Exam. |
Start your application
