Course
| code | EC334 |
| credit_hours | 3 |
| title | Analog & Digital Circuit Analysis |
| arbic title | |
| prequisites | EE232 , EC233 |
| credit hours | 3 |
| Description/Outcomes | Review of basic circuit theorems - Two-Port Networks - The transfer -Phase and Time rnResponses - Bode Plot - Phase and Group Delays - Computer-Aided Analysis Packages - Integrated Digital Logic Families, Definitions (Propagation Delay, Fan-in, Fan-out) - RTL, DTL, TTL Logic Families - Analysis of TTL gates - ECL Family and Examples - CMOS Digital Circuits and Logic Families Comparison. |
| arabic Description/Outcomes | |
| objectives | Synthesis of single and two-port networks. Analysis of networks and electronic circuits using standard packages. Analysis of different logic gates( RTL, DTL, TTL, CMOS). |
| arabic objectives | |
| ref. books | W.J. Hayt and J.E. Kemmerly, Engineering Circuit Analysis, McGraw Hill,1986. J.N. Nilsson and S.A. Riedel, Electric Circuits, Prentice Hall, 2004. |
| arabic ref. books | |
| textbook | DeMassa, Ciccone “Digital Integrated Circuitsâ€, John Wiley, 2003. |
| arabic textbook | |
| objective set | |
| content set | |
Course Content
| content serial |
Description |
| 1 |
Course Overview, Review of basic circuit theorems (Thevenin`s, Norton, and Milliman), Maximum Power Transfer Principal, and Laplace Transform.
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| 2 |
Two-Port Networks, The transfer , Poles and Zeros, Describing rnmatrices.
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| 3 |
Frequency, Phase and Time Responses.
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| 4 |
Bode Plot, Input and Output Impedance,Phase and Group Delays.
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| 5 |
Computer-Aided Analysis Packages(Pspice, Microcap, EWB).
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| 6 |
Integrated Digital Logic Families,Definitions (Propagation Delay, Fan-in, Fan-out).
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| 7 |
Diode Switching, Transistor Switching.
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| 8 |
RTL, DTL, TTL Logic Families.
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| 9 |
Analysis of TTL gates.
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| 10 |
ECL Family and Examples.
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| 11 |
CMOS Digital Circuits and Logic Families Comparison.
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| 12 |
CMOS Inverter – Static Characteristics.
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| 13 |
CMOS Inverter – Dynamic Characteristics.
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| 14 |
CMOS Realization of Boolean Expressions (Compound Gates).rn
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| 15 |
CMOS VLSI Realization Aspects in Combinational Circuits.
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| 16 |
Final Examination
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